Gate-1992

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Question 1

A	ABC + B'C' + A'C'

Digital-Logic-Design K-Map

Question 1 Explanation:

We can write this as

⇒ ABC + B'C' + A'C'

Question 2

Consider a 3-bit error detection and 1-bit error correction hamming code for 4-bit date. The extra parity bits required would be ________ and the 3-bit error detection is possible because the code has a minimum distance of ________

A	Fill in the blanks

Digital-Logic-Design Parity-Bits

Question 3

Many microprocessors have a specified lower limit on clock frequency (apart from the maximum clock frequency limit) because ______

A	clock frequency can't go below this value.

Computer-Organization Microprocessor

Question 3 Explanation:

Clock frequency becomes low memory time period of clock becomes high. When this time period increases beyond the time period in which the non-volatile memory contents must be refreshed, we loose those contents. So clock frequency can't go below this value.

Question 4

Many of the advanced microprocessors prefetch instructions and store it in an instruction buffer to speed up processing. This speed up is achieved because _________

A	prefetching the instructions to be executed can save considerable amount of waiting time.

Computer-Organization Microprocessor

Question 4 Explanation:

Because CPU is faster than memory. Fetching the instructions from memory would require considerable amount of time while CPU is much faster. So, prefetching the instructions to be executed can save considerable amount of waiting time.

Question 5

A simple and reliable data transfer can be accomplished by using the ‘handshake protocol’. It accomplishes reliable data transfer because for every data item sent by the transmitter __________.

A	in this case receiver has to respond that receiver can be able to receive the data item.

Computer-Networks Handshake-Protocol

Question 6

In an 11-bit computer instruction format, the size of address field is 4-bits. The computer uses expanding OP code technique and has 5 two-address instructions and 32 two-address instructions and the number of zero-address instructions it can support is _________

256

Computer-Organization OP-Code

Question 6 Explanation:

In encoding no. of possible instructions = 2¹¹ = 2048
The possibility of no. of encoding taken by two-address instructions = 5×2⁴×2⁴ = 1280
By one-address instructions = 32×24 = 512
So, the possibility of zero-address instructions =2048-(1280+512) = 256

Question 7

Macro expansion is done in pass one instead of pass two in a pass macro assembler because _________

A	all macro definitions are processed during the first pass only due to all macro expansions done during pass 1 only not in pass 2.

Computer-Organization Macro-Expansion

Question 8

The purpose of instruction location counter in an assembler is _______

A	used to assign storage address to the program's statements.

Computer-Organization Counters

Question 8 Explanation:

is used to assign storage address to the program's statements. As the instruction of a source module are being assembled, the location counter keeps track of current location in storage.

Question 9

Complexity of Kruskal’s algorithm for finding the minimum spanning tree of an undirected graph containing n vertices and m edges if the edges are sorted is __________

A	O(m log n)

Algorithms Krushkal's-Algorithm

Question 9 Explanation:

Though the edges are to be sorted still due to union find operation complexity is O(m log n).

Question 10

Maximum number of edges in a planar graph with n vertices is ________

3n - 6

Engineering-Mathematics Graph-Theory

Question 10 Explanation:

The maximum is 3(n - 8) for every n>2.
⇒ (3n - 2) = 3n - 6

Question 11

The operation which is commutative but not associative is:

A	AND
B	OR
C	EX-OR
D	NAND

Digital-Logic-Design Operators

Question 11 Explanation:

NAND and NOR operation follow commutativity but do not follow associativity.

Question 12

All digital circuits can be realized using only

A	Ex-OR gates
B	Multiplexers
C	Half adders
D	OR gates
E	Both B and C

Digital-Logic-Design Operators

Question 12 Explanation:

NOR gate, NAND gate, Multiplexers and Half adders can also be used to realize all digital circuits.

Question 13

Bit-slice processors

A	Can be cascaded to get any desired word length processor
B	speed of operation is independent of the word length configured
C	don’t contain anything equivalent of program counter in a ‘normal’ microprocessor
D	contain only the data path of a ‘normal’ CPU

Computer-Organization Bit-slicing

Question 13 Explanation:

Bit string is a technique for constructing a processor from modules of processors of smaller bit width, for the purpose of increasing word length.

Question 14

PCHL is an instruction in 8085 which transfers the contents of the register pair HL to PC. This is not a very commonly used instruction as it changes the flow of control in rather ‘unstructured’ fashion. This instruction can be useful in implementing.

A	if ……. then ….. else ….. construct
B	while …… construct
C	case …… construct
D	call …… construct

Computer-Organization Microprocessor

Question 14 Explanation:

Note: Out of syllabus.

Question 15

Start and stop bits do not contain an ‘information’ but are used in serial communication for

A	Error detection
B	Error correction
C	Synchronization
D	Slowing down the communications

Computer-Networks Sequential-Circuits

Question 15 Explanation:

The start and stop bits are used to synchronize the serial receivers.

Question 16

Which of the following problems is not NP-hard?

A	Hamiltonian circuit problem
B	The 0/1 Knapsack problem
C	Finding bi-connected components of a graph
D	The graph colouring problem

Theory-of-Computation NP-Complete

Question 16 Explanation:

Note: Out of syllabus.

Question 17

A	4
B	5
C	6
D	7
E	Both A and D

Data-Structures Trees

Question 17 Explanation:

Case 1:

Where L is leaf node.
So, no. of internal node is 4.
Case 2:

Where L is leaf node.
So, no. of internal node is 7.

Question 18

A non-planar graph with minimum number of vertices has

A	9 edges, 6 vertices
B	6 edges, 4 vertices
C	10 edges, 5 vertices
D	9 edges, 5 vertices

Engineering-Mathematics Graph-Theory

Question 18 Explanation:

The above graph with 5 vertices and 10 edges is non-planar.

Question 19

Following algorithm(s) can be used to sort n integers in the range [1...n³] in O(n) time

A	Heapsort
B	Quicksort
C	Mergesort
D	Radixsort

Algorithms Sorting

Question 19 Explanation:

As no comparison based sort can ever do any better than nlogn. So option (A), (B), (C) are eliminated. O(nlogn) is lower bound for comparison based sorting.
As Radix sort is not comparison based sort (it is counting sort), so can be done in linear time.

Question 20

At a particular time of computation the value of a counting semaphore is 7. Then 20 P operations and 15 V operations were completed on this semaphore. The resulting value of the semaphore is:

A	42
B	2
C	7
D	12

Operating-Systems Semaphores

Question 20 Explanation:

Let the semaphore be S.
Initial value of S is 7.
So after 20P operations and 15V operations the value of semaphore S will be,
S = 7-20+15 = 2

Question 21

A computer system has 6 tape drives, with n process completing for them. Each process may need 3 tape drives. The maximum value of n for which the system is guaranteed to be deadlock free is:

A	2
B	3
C	4
D	1

Operating-Systems Deadlock

Question 21 Explanation:

Lets give 2 tape driver to each process, so that there will be deadlock. So 3 processes will be given two drives each so that there will be deadlock. So to avoid deadlock maximum no. of process should be 1 less than the minimum no. of process that will cause deadlock. So for n=2, the system is guaranteed to be deadlock free.

Question 22

Which of the following is an example of a spooled device?

A	The terminal used to the input data for a program being executed.
B	The secondary memory device in a virtual memory system
C	A line printer used to print the output of a number of jobs.
D	None of the above

Operating-Systems Spooled-Devices

Question 22 Explanation:

Spool stands for simultaneous peripheral operations online.

Question 23

A	FOLLOW(A) and LFOLLOW (A) may be different.
B	FOLLOW(A) and RFOLLOW (A) are always the same.
C	All the three sets are identical.
D	All the three sets are different.
E	Both A and B

Theory-of-Computation Contest-Free-Grammar

Question 23 Explanation:

LFOLLOW may be different but RFOLLOW and FOLLOW will be same.

Question 24

Consider the SLR(1) and LALR (1) parsing tables for a context free grammar. Which of the following statements is/are true?

A	The go to part of both tables may be different.
B	The shift entries are identical in both the tables.
C	The reduce entries in the tables may be different.
D	The error entries in the tables may be different.
E	B, C and D.

Compiler-Design Parsers

Question 24 Explanation:

Goto parts and shift entry must be same.
Reduce entry and error entry may be different due to conflicts.

Question 25

Which of the following predicate calculus statements is/are valid:

A	(∀x) P(x) ∨ (∀x)Q(x) → (∀x){P(x) ∨ Q(x)}
B	(∃x)P(x) ∧ ∃(x)Q(x) → (∃x){P(x) ∧ Q(x)}
C	(∀x){P(x) ∨ Q(x)} → (∀x)P(x) ∨ (∀x)Q(x)
D	(∃x){P(x) ∨ Q(x)} → ~(∀x)P(x) ∨ (∃x)Q(x)

Engineering-Mathematics Prepositional-Logic

Question 25 Explanation:

(A) Valid
(B) Invalid
(C) Invalid
(D) Invalid

Question 26

Which of the following is/are tautology

A	a ∨ b → b ∧ c
B	a ∧ b → b ∨ c
C	a ∨ b → (b → c)
D	a → b → (b → c)

Engineering-Mathematics Prepositional-Logic

Question 26 Explanation:

Question 27

Which of the following regular expression identifies are true?

A	r() = r
B	(rs) = (r+s)*
C	(r+s)* = r* + s*
D	rs = r* + s*

Theory-of-Computation Regular-Expressions

Question 27 Explanation:

(A) Answer.
(B) RHS generates Σ* while LHS can't generate strings where r comes after s like sr, srr, etc.
LHS ⊂ RHS.
(C) LHS generates Σ* while RHS can't generate strings where r comes after an s.
RHS ⊂ LHS.
(D) LHS contains all strings where after an s, no r comes. RHS contains all strings of either r or s but no combination of them.
So, RHS ⊂ LHS.

Question 28

If G is a context-free grammar and w is a string of length l in L(G), how long is a derivation of w in G, if G is Chomsky normal form?

A	2l
B	2l + 1
C	2l - 1
D	l

Theory-of-Computation CFG

Question 28 Explanation:

For CNF, it is
2l - 1
For GNF, it is
l

Question 29

Context-free languages are

A	closed under union
B	closed under complementation
C	closed under intersection
D	closed under Kleene closure
E	Both A and D

Theory-of-Computation CFL

Question 29 Explanation:

CFL's are not closed under intersection and complementation.

Question 30

A	M₁ is non-deterministic finite automaton
B	M₁ is a non-deterministic PDA
C	M₁ is a non-deterministic Turing machine
D	For no machine M₁ use the above statement true
E	Both A and C

Theory-of-Computation General

Question 30 Explanation:

For every NFA there exists a DFA.
For every NPDA there does not exist a deterministic PDA.
Every non-deterministic TM has an equivalent deterministic TM.

Question 31

A	Theory Explanation.

Computer-Organization Macro-Expansion

Question 32

A	a-2, b-1, c-2, d-1

Computer-Organization Assembler

Question 32 Explanation:

Two pass assembler.
Pass 1:
→ Assign addresses to all statements.
→ Save the values assigned to all labels for use in pass 2.
→ Perform some processing of assembler directives.
Pass 2:
→ Assembler instructions by translating opcode and symbolic operands.
→ Generate data values defined by BYTE, WORD.
→ Perform processing of assembler directives not done in pass 1.
→ Write the object program and the assembly listing.

Question 33

How many edges are there in a forest with p components having n vertices in all?

n-p

Data-Structures Graphs

Question 33 Explanation:

Forest is a graph with no cycle.
Now, '0' edges for p-1 vertices (p-1 components) and n-p edges for n-p+1 vertices (1 component).
So, total of n-p edges for p components.

Question 34

Assume that the last element of the set is used as partition element in Quicksort. If n distinct elements from the set [1…..n] are to be sorted, give an input for which Quicksort takes maximum time.

O(n^2)

Algorithms Quick-Sort

Question 34 Explanation:

For n distinct elements the algorithm will take maximum time when:
→ The array is already sorted in ascending order.
→ The array is already sorted in descending order.

Question 35

Which page replacement policy sometimes leads to more page faults when size of memory is increased?

FIFO

Operating-Systems Page-Replacement-Algorithm

Question 35 Explanation:

FIFO, because it sometimes leads to more page faults when size of memory is increased.

There are 35 questions to complete.

A	r() = r
B	(rs) = (r+s)*
C	(r+s)* = r* + s*
D	rs = r* + s*