Number-Systems

Question 1
Consider three registers R1, R2 and R3 that store numbers in IEEE-754 single precision floating point format. Assume that R1 and R2 contain the values (in hexadecimal notation) 0x42200000 and 0xC1200000, respectively.
If R3 = R1/R2, what is the value stored in R3?
A
0x40800000
B
0x83400000
C
0xC8500000
D
0xC0800000
       Digital-Logic-Design       Number-Systems       GATE 2020
Question 1 Explanation: 
Given numbers are 0x42200000 and 0xC1200000 which are stored in the registers R1 and R2, respectively.

Question 2

Consider the unsigned 8-bit fixed point binary number representation below,

    b7b6b5b4b3 ⋅ b2b1b0

where the position of the binary point is between b3 and b2 . Assume b7 is the most significant bit. Some of the decimal numbers listed below cannot be represented exactly in the above representation:

    (i) 31.500    (ii) 0.875    (iii) 12.100    (iv) 3.001

Which one of the following statements is true?

A
None of (i), (ii), (iii), (iv) can be exactly represented
B
Only (ii) cannot be exactly represented
C
Only (iii) and (iv) cannot be exactly represented
D
Only (i) and (ii) cannot be exactly represented
       Digital-Logic-Design       Number-Systems       Gate 2018
Question 2 Explanation: 
(i) (31.5)10 = (11111.100)2 = 24 + 23 + 22 + 21 + 20 + 2-1
= 16 + 8 + 4 + 2 + 1 + 0.5
= (31.5)10
(ii) (0.875)10 = (00000.111)2
= 2-1 + 2-2 + 2-3
= 0.5 + 0.25 + 0.125
= (0.875)10
(iii) (12.100)10
It is not possible to represent (12.100)10
(iv) (3.001)10 It is not possible to represent (3.001)10
Question 3
The n-bit fixed-point representation of an unsigned real number X uses f bits for the fraction part. Let i = n-f. The range of decimal values for X in this representation is
A
2-f to 2i
B
2-f to (2i - 2-f)
C
0 to 2i
D
0 to (2i - 2-f )
       Digital-Logic-Design       Number-Systems       Gate 2017 set-01
Question 3 Explanation: 
Size of the fixed point number → n-bits
Number of bits in fraction part → f-bits
Number of bits in integer part → (n – f) bits

Minimum value:
000…0.000…0 = 0
Maximum value:

= (2 n-f - 1) + (1 - 2 -f
= (2n-f - 2 -f)
= (2i - 2 -f )
Question 4

The representation of the value of a 16-bit unsigned integer X in hexadecimal number system is BCA9. The representation of the value of X in octal number system is

A
136251
B
736251
C
571247
D
136252
       Digital-Logic-Design       Number-Systems       GATE 2017(set-02)
Question 4 Explanation: 
X = (BCA9)16
Each hexadecimal digit is equal to a 4-bit binary number. So convert
X = (BCA9)16 to binary

Divide the binary data into groups 3 bits each because each octal digit is represented by 3-bit binary number.
X = (001 011 110 010 101 001)2
Note: Two zeroes added at host significant position to make number bits of a multiple of 3 (16 + 2 = 18)
X = (136251)8
Question 5
 

Given the following binary number in 32-bit (single precision) IEEE-754 format:

00111110011011010000000000000000

The decimal value closest to this floating-point number is

A
1.45 × 101
B
1.45 × 10-1
C
2.27 × 10-1
D
2.27 × 101
       Digital-Logic-Design       Number-Systems       GATE 2017(set-02)
Question 5 Explanation: 

For single-precision floating-point representation decimal value is equal to (-1)5 × 1.M × 2(E-127)
S = 0
E = (01111100)2 = (124).
So E – 127 = - 3
1.M = 1.11011010…0
= 20 + 2(-1) + 2(-1) + 2(-4) + 2(-5) + 2(-7)
= 1+0.5+0.25+0.06+0.03+0.007
≈ 1.847
(-1)5 × 1.M × 2(E-127)
= -10 × 1.847 × 2-3
≈ 0.231
≈ 2.3 × 10-1
Question 6

Consider a quadratic equation x2 - 13x + 36 = 0 with coefficients in a base b. The solutions of this equation in the same base b are x = 5 and x = 6. Then b=________.

A
8
B
9
C
10
D
11
       Digital-Logic-Design       Number-Systems       GATE 2017(set-02)
Question 6 Explanation: 
x2 - 13x + 36 = 0 ⇾(1)
Generally if a, b are roots.
(x - a)(x - b) = 0
x2 - (a + b)x + ab = 0
Given that x=5, x=6 are roots of (1)
So, a + b = 13
ab=36 (with same base ‘b’)
i.e., (5)b + (6)b = (13)b
Convert them into decimal value
5b = 510
610 = 610
13b = b+3
11 = b+3
b = 8
Now check with ab = 36
5b × 6b = 36b
Convert them into decimals
5b × 6b = (b×3) + 610
30 = b × 3 + 6
24 = b × 3
b = 8
∴ The required base = 8
Question 7

Consider a binary code that consists of only four valid code words as given below:

00000, 01011, 10101, 11110

Let the minimum Hamming distance of the code be p and the maximum number of erroneous bits that can be corrected by the code be q. Then the values of p and q are

A
p=3 and q=1
B
p=3 and q=2
C
p=4 and q=1
D
p=4 and q=2
       Digital-Logic-Design       Number-Systems       GATE 2017(set-02)
Question 7 Explanation: 
Hamming distance of a code is minimum distance between any two code words.
Minimum Distance = p = 3

Error bits that can be corrected = (p-1)/2 = (3-1)/2 = 1
∴ p=3 and q=1
Question 8

The 16-bit 2’s complement representation of an integer is 1111 1111 1111 0101; its decimal representation is __________.

A
-11
B
-12
C
-13
D
-14
       Digital-Logic-Design       Number-Systems       2016 set-01
Question 8 Explanation: 
Given number is 1111 1111 1111 0101.
It is a negative number because MSB is 1.
Magnitude of 1111 1111 1111 0101 is 2’s complement of 1111 1111 1111 0101.
1111 1111 1111 0101
0000 0000 0000 1010 : 1’s Complement
0000 0000 0000 1011 : 2’s complement
= (11)10
Hence, 1111 1111 1111 0101 = -11
Question 9

Let X be the number of distinct 16-bit integers in 2’s complement representation. Let Y be the number of distinct 16-bit integers in sign magnitude representation.

Then X-Y is _________.

A
1
B
2
C
3
D
4
       Digital-Logic-Design       Number-Systems       GATE 2016 set-2
Question 9 Explanation: 
X = 216
Since range is - 215 to 215 - 1
Y = 216 - 1
Here, +0 and -0 are represented separately.
X - Y = 216 - (216 - 1)
= 1
Question 10
The base (or radix) of the number system such that the following equation holds is____________. 
312/20 = 13.1
 
A
5
B
6
C
7
D
8
       Digital-Logic-Design       Number-Systems       GATE 2014(Set-01)
Question 10 Explanation: 
Let base of the number system is r.
(3r2 + r + 2) / 2r= (r+3+1/r)
(3r2 + r + 2) / 2r= (r2+3r+1) / r
(3r2 + r + 2) = (2r2+6r+2)
r2 -5r = 0
Therefor r = 5
Question 11
Consider the equation (123)5 = (x8)y with x and y as unknown. The number of possible solutions is __________.
A
3
B
5
C
6
D
7
       Digital-Logic-Design       Number-Systems       Gate 2014 Set -02
Question 11 Explanation: 
First we have to fullfill all the conditios,
(123)5 = (x8)y
In R.H.S. since y is base so y should be greater than x and 8, i.e.,
y > x
y > 8
Now, to solve let's change all the above bases number into base 10 number,
52 × 1 +2 × 5 + 3 = y × x + 8
38 = xy + 8
xy = 30
⇒ yx = 30
So the possible combinations are
(1,30), (2,15), (3,10), (5,6)
But we will reject (5,6) because it violates the condition (y > 8).
So, total solutions possible is 3.
Question 12
The value of a float type variable is represented using the single-precision 32-bit floating point format of IEEE-754 standard that uses 1 bit for sign, 8 bits for biased exponent and 23 bits for mantissa. A float type variable X is assigned the decimal value of −14.25. The representation of X in hexadecimal notation is
A
C1640000H
B
416C0000H
C
41640000H
D
C16C0000H
       Computer-Organization       Number-Systems       Gate 2014 Set -02
Question 12 Explanation: 
Given number is a negative number. So sign bit =1
(14.25)10 = 1110.01000
= 1.11001000 x 23
23 bit Mantissa = 11001000000000000000000
Biased Exponent = exponent + bias
= 3 + 127 = 130 = 1000 0010
(-14.25) in 32-bit IEEE-754 floating point representation is
1 10000010 11001000000000000000000
=1100 0001 0110 0100 0000 0000 000 0000
= (C 1 6 4 0 0 0 0)16
Question 13
A
B
C
D
       Digital-Logic-Design       Number-Systems       Gate 2014 Set -03
Question 13 Explanation: 
Question 14
A
P+Q
B
C
P⨁Q
D
       Digital-Logic-Design       Number-Systems       Gate 2014 Set -03
Question 14 Explanation: 
((1 ⊕ P ) ⊕ (P ⊕ Q)) ⊕ ((P ⊕ Q) ⊕ (Q ⊕ 0))
⊕ is associative i.e P ⊕ (Q ⊕ R) = (P⊕Q) ⊕ R.
P ⊕ P = 0, 1 ⊕ P = P’ and 0 ⊕ Q = Q
(1 ⊕ P ) ⊕ ((P ⊕ Q) ⊕ (P ⊕ Q)) ⊕ (Q ⊕ 0)
= P’⊕ (0) ⊕ Q
= P’ ⊕ Q
= (P ⊕ Q)’
Question 15
The smallest integer that can be represented by an 8-bit number in 2’s complement form is
A
-256
B
-128
C
-127
D
0
       Digital-Logic-Design       Number-Systems       Gate 2013
Question 15 Explanation: 
The range of 8-bit signed numbers representable is – 2n-1 to 2n-1 -1.
The smallest 8-bit 2’s complement number is 1000 0000.
MSB is 1. So it is a negative number.
To know the magnitude again take 2’s complement of 1000 0000.
1000 0000
0111 1111 ← 1’s complement
1000 0000 ← 2’s complement (1’s complement +1)
= 128
-128 is 1000 0000 in 2’s complement representation.
Question 16
Which one of the following expressions does NOT represent exclusive NOR of x and y?
A
xy+x'y'
B
x⊕y'
C
x'⊕y
D
x'⊕y'
       Digital-Logic-Design       Number-Systems       Gate 2013
Question 16 Explanation: 
x ⊕ y = x’y + xy’
x’ ⊕ y’ = xy’ + x’y = x⊕y. Hence option D is correct.
Question 17
The decimal value 0.5 in IEEE single precision floating point representation has
A
fraction bits of 000…000 and exponent value of 0
B
fraction bits of 000…000 and exponent value of −1
C
fraction bits of 100…000 and exponent value of 0
D
no exact representation
       Digital-Logic-Design       Number-Systems       Gate 2012
Question 17 Explanation: 
(0.5)10 = (1.0)2 × 2–1
So, value of the exponent = -1
and
fraction is 000…000 (Implicit representation)
Question 18
P is a 16-bit signed integer. The 2's complement representation of P is (F87B)16. The 2's complement representation of 8*P is
A
(C3D8)16
B
(187B)16
C
(F878)16
D
(987B)16
       Digital-Logic-Design       Number-Systems       2010
Question 18 Explanation: 
(F87B)16 is 2's complement representation of P.
(F87B)16=(1111 1000 0111 1011)2. (It is a negative number which is in 2's complement form)
P=1111 1000 0111 1011 (2's complement form)
8 * P = 23* P= 1100 0011 1101 1000. ( NOTE: Left shift k times is equivalent to Multiplication by 2k)
Hence, 1100 0011 1101 1000 is 2's complement representation of 8P.
1100 0011 1101 1000 = (C3D8)16.
Question 19
(1217)8 is equivalent to
A
(1217)16
B
(028F)16
C
(2297)10
D
(0B17)16
       Digital-Logic-Design       Number-Systems       2009
Question 19 Explanation: 
(1217)8= (001 010 001 111)2
Divide the bits into groups, each containing 4 bits.
=(0010 1000 1111)2
=(28F)16
Question 20
In the IEEE floating point representation, the hexadecimal value 0×00000000 corresponds to
A
the normalized value 2-127
B
the normalized value 2-126
C
the normalized value +0
D
the special value +0
       Digital-Logic-Design       Number-Systems       Gate-2008
Question 20 Explanation: 
Value is ±0 if M=0 and E=0.
Question 21
  Let r denote number system radix. The only value(s) of r that satisfy the equation
A
decimal 10
B
decimal 11
C
decimal 10 and 11
D
any value >2
       Digital-Logic-Design       Number-Systems       Gate-2008
Question 21 Explanation: 

Any value of r will satisfy the above equation. But the radix should be greater than 2 because the 121 has 2. So r >2 is correct.
Question 22
The following bit pattern represents a floating point number in IEEE 754 single precision format 1 10000011 101000000000000000000000 The value of the number in decimal form is
A
-10
B
-13
C
-26
D
None of these
       Digital-Logic-Design       Number-Systems       Gate 2008-IT
Question 22 Explanation: 
Sign bit is 1 then given number is negative.
Exponent bits - 10000011
Exponent can be added with 127 bias in IEEE single precision format then outval exponent
= 10000011 - 127
= 131 - 127
= 4
→ In IEEE format, an implied 1 is before mantissa, and hence the outval number is
→ 1.101 × 24 = -(11010)2 = -26
Question 23
A processor that has carry, overflow and sign flag bits as part of its program status word (PSW) performs addition of the following two 2's complement numbers 01001101 and 11101001. After the execution of this addition operation, the status of the carry, overflow and sign flags, respectively will be:
A
1, 1, 0
B
1, 0, 0
C
0, 1, 0
D
1, 0, 1
       Digital-Logic-Design       Number-Systems       Gate 2008-IT
Question 23 Explanation: 

Carry flag = 1
Overflow flag = 0
Sign bit = 0 (MSB bit is 0)
Overflow flag:
In computer processors, the overflow flag is usually a single bit in a system status register used to indicate when an arithmetic overflow has occurred in an operation.
Question 24
The two numbers given below are multiplied using the Booth's algorithm. Multiplicand : 0101 1010 1110 1110 Multiplier: 0111 0111 1011 1101 How many additions/Subtractions are required for the multiplication of the above two numbers?  
A
6
B
8
C
10
D
12
       Digital-Logic-Design       Number-Systems       Gate 2008-IT
Question 24 Explanation: 
Take the multiples and add 0 to the LSB.
Now we have some values defined for pair of bits in Booth’s Algorithm,
00 → 0
11 → 0
01 → -1
10 → 1
Now after adding 0 to the LSB of the multiplier, start traversing from left to right and accordingly put the values defined above.

Hence, total 8 additions / subtractions required.
Question 25
(C012.25)H – (10111001110.101)B =
A
(135103.412)O
B
(564411.412)O
C
(564411.205)O
D
(135103.205)O
       Digital-Logic-Design       Number-Systems       Gate 2007-IT
Question 25 Explanation: 
(C012.25)H – (10111001110.101)B
= 1100000000010010.00100101 - 0000010111001110.10100000
= 1011101001000011.10000101
= 1011101000011.100001010
= (135103.412)O
Question 26
Consider numbers represented in 4-bit gray code. Let h3h2h1h0 be the gray code representation of a number n and let g3g2g1g0 be the gray code of (n+1) (modulo 16) value of the number. Which one of the following functions is correct?
A
g0(h3h2h1h0) = Σ(1,2,3,6,10,13,14,15)
B
g1(h3h2h1h0) = Σ(4,9,10,11,12,13,14,15)
C
g2(h3h2h1h0) = Σ(2,4,5,6,7,12,13,15)
D
g3(h3h2h1h0) = Σ(0,1,6,7,10,11,12,13)
       Digital-Logic-Design       Number-Systems       Gate-2006
Question 26 Explanation: 

g2(h3h2h1h0) = Σ(2,4,5,6,7,12,13,15)
Question 27
The addition of 4-bit, two’s complement, binary numbers 1101 and 0100 results in
A
0001 and an overflow
B
1001 and no overflow
C
0001 and no overflow
D
1001 and an overflow
       Digital-Logic-Design       Number-Systems       Gate 2006-IT
Question 27 Explanation: 
2's complement of 1101 = 0011
2's complement of 1100 = 1100
Add = 1111
Now convert 1111 to normal form.
⇒ 0000 (1's complement)
⇒ 0001 (2's complement) No carry bit.
Question 28
When multiplicand Y is multiplied by multiplier X = xn - 1xn-2 ....x0 using bit-pair recoding in Booth's algorithm, partial products are generated according to the following table. The partial products for rows 5 and 8 are    
A
2Y and Y
B
-2Y and 2Y
C
-2Y and 0
D
0 and Y
       Digital-Logic-Design       Number-Systems       Gate 2006-IT
Question 28 Explanation: 

⇒ -2Y and 0
Question 29
The range of integers that can be represented by an n bit 2's complement number system is:
A
- 2n-1 to (2n-1 - 1)
B
- (2n-1 - 1) to (2n-1 - 1)
C
- 2n-1 to 2n-1
D
- (2n-1 + 1) to (2n-1 - 1)
       Digital-Logic-Design       Number-Systems       Gate-2005
Question 29 Explanation: 
The maximum (positive) n bit number is 011….1 (i.e., 0 followed by n-1 ones) which is equal to 2n-1 - 1.
The smallest (negative) n bit number is 100..0 (i.e., 1 followed by n-1 zeros) which is equal to - 2n-1.
1000...00
0111...11 <- 1’s complement
1000..00 <- 2’s complement
= - 2n-1
Question 30
Consider the following floating point format Mantissa is a pure fraction in sign-magnitude form. The decimal number 0.239 × 213 has the following hexadecimal representation (without normalization and rounding off :  
A
0D 24
B
0D 4D
C
4D 0D
D
4D 3D
       Digital-Logic-Design       Number-Systems       Gate-2005
Question 30 Explanation: 
Sign Bit = 0
Convert 0.239 to binary
0.239 * 2 = 0.478
0.478 * 2 = 0.956
0.956 * 2 = 1.912
0.912 * 2 = 1.824
0.824 * 2 = 1.648
0.648 * 2 = 1.296
0.296 * 2 = 0.512
0.512 * 2 = 1.024
Mantissa = (0. 00111101)2
Bias= 64. So biased exponent is 13+64 = 77= (1001101)2
0.239 × 213 = 0 1001101 00111101
= 0100 1101 0011 1101
= 4 D 3 D
Question 31
Consider the following floating point format Mantissa is a pure fraction in sign-magnitude form. The normalized representation for the above format is specified as follows. The mantissa has an implicit 1 preceding the binary (radix) point. Assume that only 0's are padded in while shifting a field. The normalized representation of the above number (0.239 × 213) is:
A
0A 20
B
11 34
C
4D D0
D
4A E8
       Digital-Logic-Design       Number-Systems       Gate-2005
Question 31 Explanation: 
Sign Bit = 0
Convert 0.239 to binary
0.239 * 2 = 0.478
0.478 * 2 = 0.956
0.956 * 2 = 1.912
0.912 * 2 = 1.824
0.824 * 2 = 1.648
0.648 * 2 = 1.296
0.296 * 2 = 0.512
0.512 * 2 = 1.024
Mantissa = (0. 00111101)2
0.239 × 213 = 1.11101000 x 210 <- Normalized Mantissa
Bias = 64. So biased exponent is 10+64 = 74 = (1001010)2
0.239 × 213 = 0 1001010 11101000
= 0100 1010 1110 1000
= (4 A E 8)16
Question 32
The hexadecimal representation of 6578 is
A
1AF
B
D78
C
D71
D
32F
       Digital-Logic-Design       Number-Systems       Gate-2005
Question 32 Explanation: 
(657)8 = (110 101 111)2
Make 3 zeros on the left side so that the number of bits is multiple of 4.
= (0001 1010 1111)2
= (1 A F)16
Question 33
(34.4)8 × (23.4)8 evaluates to
A
(1053.6)8
B
(1053.2)8
C
(1024.2)8
D
None of these
       Digital-Logic-Design       Number-Systems       Gate 2005-IT
Question 33 Explanation: 
First convert (34.4)8 and (23.4)8 to decimal.
(34.4)8 = 3×81 + 4×80 + 4×8-1
= 24 + 4 + 0.5
= (28.5)10
(23.4)8 = 2×81 + 3×80 + 4×8-1
= 16 + 3 + 0.5
= (19.5)10
Now,
(28.5)10 × (19.5)01 = (555.75)10
Now,
(555.75)10 = ( ? )8
To convert the integer part,

We get, 1053.
To convert the fractional part, keep multiplying by 8 till decimal part becomes 0,

∴ (555.75)10 = (1053.6)8
Question 34
If 73x (in base-x number system) is equal to 54y (in base-y number system), the possible values of x and y are
A
8, 16
B
10, 12
C
9, 13
D
8, 11
       Digital-Logic-Design       Number-Systems       Gate-2004
Question 34 Explanation: 
(73)x = (54)y
7x+3 = 5y+4
7x-5y = 1
Only option (D) satisfies above equation.
Question 35
 
A
9.51 and 10.0 respectively
B
10.0 and 9.51 respectively
C
9.51 and 9.51 respectively
D
10.0 and 10.0 respectively
       Digital-Logic-Design       Number-Systems       Gate-2004
Question 35 Explanation: 
(113. + -111.) + 7.51
= (2) + 7.51
= 9.51 (✔️)
113. + (-111. + 7.51)
= 113. + (-103.51)
= 113. + -103
= 10 (✔️)
Question 36
Let A = 1111 1010 and B = 0000 1010 be two 8-bit 2's complement numbers. Their product in 2's complement is
A
1100 0100
B
1001 1100
C
1010 0101
D
1101 0101
       Digital-Logic-Design       Number-Systems       Gate-2004
Question 36 Explanation: 
A = 1111 1010 = -610 [2's complement number]
B = 0000 1010 = 1010 [2's complement number]
A×B = -6×10 = - 6010
⇒ -6010 = 101111002
= 110000112 (1's complement)
= 110001002 (2's complement)
Question 37
The number (123456)8 is equivalent to
A
(A72E)16 and (22130232)4
B
(A72E)16 and (22131122)4
C
(A73E)16 and (22130232)4
D
(A62E)16 and (22120232)4
       Digital-Logic-Design       Number-Systems       Gate 2004-IT
Question 37 Explanation: 
(123456)8 = (001 010 011 100 101 110)2
= (00 1010 0111 0010 1110)2
= (A72E)16
Also,
(001 010 011 100 101 110)2
= (00 10 10 01 11 00 10 11 10)2
= (22130232)4
Question 38
Consider a parity check code with three data bits and four parity check bits. Three of the code words are 0101011, 1001101 and 1110001. Which of the following are also code words? I. 0010111             II. 0110110         III. 1011010             IV. 0111010
A
I and III
B
I, II and III
C
II and IV
D
I, II, III and IV
       Digital-Logic-Design       Number-Systems       Gate 2004-IT
Question 38 Explanation: 
Let x1, x2, x3 are data bits, and c1, c2, c3 and c4 are parity check bits.
Given transmitted codewords are

By inspection we can find the rule for generating each of the parity bits,

Now from above we can see that (I) and (III) are only codewords.
Question 39
Assuming all numbers are in 2’s complement representation, which of the following numbers is divisible by 11111011?  
A
11100111
B
11100100
C
11010111
D
11011011
       Digital-Logic-Design       Number-Systems       Gate-2003
Question 39 Explanation: 
Given: Binary numbers = 11111011
MSB bit is '1' then all numbers are negative
1's complement = 00000100
2's complement = 00000100 + 00000001 = 00000101 = -5
(A) 11100111 - (-25)10
(B) 11100100 - (-28)10
(C) 11010111 - (-41)10
(D) 11011011 - (-37)10
Answer: Option A (-25 is divisible by -5)
Question 40
The following is a scheme for floating point number representation using 16 bits. 
Bit position 15           14 . . . 9            8 . . . . .0
       s                      e                      m
     Sign                  Exponent               Mantissa
Let s,e, and m be the numbers represented in binary in the sign, exponent, and mantissa fields respectively. Then the floating point number represented is: What is the maximum difference between two successive real numbers representable in this system?  
A
2-40
B
2-9
C
222
D
231
       Digital-Logic-Design       Number-Systems       Gate-2003
Question 40 Explanation: 
Largest gap will be in between two most largest numbers.
The largest number is 1.111111111× 262-31 = (2−2−9)×231
Second largest number is 1.111111110×262-31 = (2−2-8)×231
Difference = (2−2−9)×231 - (2−2-8)×231
= (2-8−2−9) ×231
= 2−9×231
= 222
Question 41
The decimal value 0.25
A
is equivalent to the binary value 0.1
B
is equivalent to the binary value 0.01
C
is equivalent to the binary value 0.00111…
D
cannot be represented precisely in binary
       Digital-Logic-Design       Number-Systems       Gate-2002
Question 41 Explanation: 
1st Multiplication iteration:
Multiply 0.25 by 2.
0.25×2 = 0.50 (product)
Fractional part = 0.50
Carry = 0
2nd Multiplication iteration:
Multiply 0.50 by 2.
0.50×2 = 1.00 (product)
Fractional part = 0.00
Carry = 1
The fractional part in the 2nd iteration becomes zero and so we stop the multiplication iteration.
Carry from 1st multiplication iteration becomes MSB and carry from 2nd iteration becomes LSB. So the result is 0.01.
Question 42
The 2’s complement representation of the decimal value -15 is
A
1111
B
11111
C
111111
D
10001
       Digital-Logic-Design       Number-Systems       Gate-2002
Question 42 Explanation: 
15 = 1111
-15 = 11111
1's complement = 10000
2's complement = 10001
Question 43
Sign extension is a step in
A
floating point multiplication
B
signed 16 bit integer addition
C
arithmetic left shift
D
converting a signed integer from one size to another
       Digital-Logic-Design       Number-Systems       Gate-2002
Question 43 Explanation: 
Sign extension is a step in converting a signed integer from on size to another.
Question 44
In 2’s complement addition, overflow
A
is flagged whenever there is carry from sign bit addition
B
cannot occur when a positive value is added to a negative value
C
is flagged when the carries from sign bit and previous bit match
D
None of the above
       Digital-Logic-Design       Number-Systems       Gate-2002
Question 44 Explanation: 
The left most bit of positive value is zero. And left most bit for negative value is one. The value of 0+1 becomes 1. Then overflow never occurs.
Question 45
 
A
Theory of Explantion is given below.
       Digital-Logic-Design       Number-Systems       Gate-2002
Question 46
The number 43 in 2’s complement representation is
A
01010101
B
11010101
C
00101011
D
10101011
       Digital-Logic-Design       Number-Systems       Gate-2000
Question 46 Explanation: 
Positive integers are represented in its normal binary form while negative numbers are represented in its 2′s complement form. Binary representation of 43 is 00101011.
Question 47
 
A
X = 1.0, Y = 1.0
B
X = 1.0, Y = 0.0
C
X = 0.0, Y = 1.0
D
X = 0.0, Y = 0.0
       Digital-Logic-Design       Number-Systems       Gate-2000
Question 47 Explanation: 
Given: 32 bits representation. So, the maximum precision can be 32 bits (In 32-bit IEEE representation, maximum precision is 24 bits but we take best case here). This means approximately 10 digits.
A = 2.0 * 1030, C = 1.0
So, A + C should make the 31st digit to 1, which is surely outside the precision level of A (it is 31st digit and not 31st bit). So, this addition will just return the value of A which will be assigned to Y.
So, Y + B will return 0.0 while X + C will return 1.0.
Question 48
Booth’s coding in 8 bits for the decimal number –57 is
A
0 – 100 + 1000
B
0 – 100 + 100 -1
C
0 – 1 + 100 – 10 + 1
D
00 – 10 + 100 - 1
       Digital-Logic-Design       Number-Systems       Gate-1999
Question 48 Explanation: 
Represent the multiplier in 2's complement form.
-57 = 1100 0111
In Booth's algorithm, an operation (ADD or SUB) or/and Arithmetic Right Shift (ARS) operation is performed based on two least significant bits(Q0 Q-1) of Multiplier.
(Note: After RIGHT shift operation bits in higher significant positions move to lower significant position)
Question 49
Zero has two representations in
A
Sign magnitude
B
1’s complement
C
2’s complement
D
None of the above
E
Both A and B
       Digital-Logic-Design       Number-Systems       Gate-1999
Question 49 Explanation: 
Sign magnitude:
+0 = 0000
-0 = 1000
1's complement:
+0 = 0000
-0 = 1111
Question 50
The octal representation of an integer is (342)8. If this were to be treated as an eight-bit integer is an 8085 based computer, its decimal equivalent is
A
226
B
-98
C
76
D
-30
       Digital-Logic-Design       Number-Systems       Gate-1998
Question 50 Explanation: 
(342)8 = (011 100 010)2 = (1110 0010)2
If this can be treated as 8 bit integer, then the first becomes sign bit i.e., '1' then the number is negative.
8085 uses 2's complement then

⇒ -30
Question 51

Suppose the domain set of an attribute consists of signed four digit numbers. What is the percentage of reduction in storage space of this attribute if  it is stored as an integer rather than in character form?

A
80%
B
20%
C
60%
D
40%
       Digital-Logic-Design       Number-Systems       Gate-1998
Question 51 Explanation: 
We assume byte addressable memory - nothing smaller than a byte can be used.
We have four digits. So to represent signed 4 digit numbers we need 5 bytes, 4 bytes for four digits and 1 for the sign.
So required memory = 5 bytes.
Now, if we use integer, the largest no. needed to represent is 9999 and this requires 2 bytes of memory for signed representation.
9999 in binary requires 14 bits. So, 2 bits remaining and 1 we can use for sign bit.
So, memory savings,
= 5 - 2/5 × 100
= 60%
Question 52
   
A
10
B
8
C
5
D
6
       Digital-Logic-Design       Number-Systems       Gate-1997
Question 52 Explanation: 
Question 53
 
A
0 to 1
B
0.5 to 1
C
2-23 to 0.5
D
0.5 to (1-2-23)
       Digital-Logic-Design       Number-Systems       Gate-1996
Question 53 Explanation: 
Maximum value of mantissa will be 23, is where a decimal point is assumed before first 1. So the value is 1 - 2-23.
Question 54
 
A
8
B
9
C
10
D
12
       Digital-Logic-Design       Number-Systems       Gate-1995
Question 54 Explanation: 
Question 55

Consider n-bit (including sign bit) 2’s complement representation of integer number. The range of integer values, N, that can be represented is _________ ≤ N ≤ _________

A
-2n-1 to 2n-1 - 1
       Digital-Logic-Design       Number-Systems       Gate-1994
Question 56
 
A
(a) 6.625, (b) (45E)H
       Digital-Logic-Design       Number-Systems       Gate-1993
Question 56 Explanation: 
(a) 1*22 + 1*21 + 0*20 + 1*2-1 + 0*2-2 + 1*2-3
= 4 + 2 + 0 + 0.5 + 0 + 0.125
= 6.625
(b) 1118 mod 16 = E, quotient = 69
69 mod 16 = 5, quotient = 4
4 mod 16 = 4
Writing the mods result in reverse order gives (45E)H.
Question 57
The 2’s complement representation of (-539)10 in hexadecimal is
A
ABE
B
DBC
C
DE5
D
9E7
       Digital-Logic-Design       Number-Systems       Gate-2001
Question 57 Explanation: 
(539)10 = (0010 0001 1011)2
For (-539)10 = (1101 1110 0100)2
1's complement = (1101 1110 0100)2
2's complement = (1101 1110 0101)2
= (DE5)16
Question 58
 
A
f = x1' + x2
B
f = x1'x2 + x1x2'
C
f = x1x2 + x1'x2'
D
f = x1 + x2'
       Digital-Logic-Design       Number-Systems       Gate-2001
Question 58 Explanation: 
g = (a and x1′) or (b and x1)
g = (1 and x1’) or (0 and x1)
g = x1’
f = ac’ + bc
f = (a and x2′) or (b and x2)
f = (g and x2′) or (x1 and x2)
f = x1’x2’ + x1x2
Question 59
   
A
9
       Digital-Logic-Design       Number-Systems       Gate-1991
Question 59 Explanation: 
Hexadecimal representation of a given no. is,
(9753)16
It's binary representation is,
1001011101010011
∴ The no. of 1's is 9.
Question 60
When two 4-bit binary number A = a3a2a1a0 and B = b3b2b1b0 are multiplied, the digit c1 of the product C is given by _________
A
c1 = b1a0 ⊕ a1b0
       Digital-Logic-Design       Number-Systems       Gate-1991
Question 60 Explanation: 

⇒ c1 = b1a0 ⊕ a1b0
Question 61
The exponent of a floating-point number is represented in excess-N code so that:
A
The dynamic range is large.
B
The precision is high.
C
The smallest number is represented by all zeros.
D
Overflow is avoided.
       Digital-Logic-Design       Number-Systems       GATE-1987
Question 61 Explanation: 
To avoid extra work, excess-N code is used so that all exponent can be represented in positive numbers, starting with 0.
There are 61 questions to complete.
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