Question 1

 A T1.I1 + T2.I3 + T4.I3 + T3 B (T1 + T2 + T3).I3 + T1.I1 C (T1 + T2 ).I1 + (T2 + T4).I3 + T3 D (T1 + T2 ).I2 + (T1 + T3).I1 + T3
Operating Systems       Pipeling and addressing modes       Gate 2004-IT
Question 1 Explanation:
We just have to see which option gives 1 whenever Ain is 1 and 0 otherwise.
So, Ain is 1 in T3 of I1, I2 and I3. Also during T1, and T2 and T4 of I3. So, answer will be
T1.I1 + T2.I3 + T4.I3 + T3.I1 + T3.I2 + T3.I3
Since, CPU is having only 3 instructions, T3.I1 + T3.I2 + T3.I3 can be replaced by T3.
So, T1.I1 + T2.I3 + T4.I3 + T3
 Question 2
In an enhancement of a design of a CPU, the speed of a floating point unit has been increased by 20% and the speed of a fixed point unit has been increased by 10%. What is the overall speedup achieved if the ratio of the number of floating point operations to the number of fixed point operations is 2:3 and the floating point operation used to take twice the time taken by the fixed point operation in the original design?
 A 1.155 B 1.185 C 1.255 D 1.285
Operating Systems       Pipeling and addressing modes       Gate 2004-IT
Question 2 Explanation:
There are 2 questions to complete.